Conventionally, integrated circuit devices within electronic appliances have been manufactured by forming individual LSIs of different types, for example, memory and processor, on semiconductor chips and then mounting the chips on a base substrate such as a printed circuit board.
Recently, however, there is a higher demand for miniaturized, lightweight, power-saving and low-cost integrated circuit devices used in electronic appliances, for the purpose of wider-ranging utilization of the electronic appliances. This trend is even more pronounced in the field of digital information household appliances. And in response to this trend, semiconductor manufacturers are forced to shift their emphasis on research and development from memories toward system LSIs.
Specifically, such system LSIs are realized by a so-called system-on-chip solution with the memory and a variety of logic circuits provided on a single chip. For the system-on-chip solution, process technology is required for forming elements having different structures on a common substrate, but also the design technology therefor needs to be revolutionized.
Thus, a so-called IP based method of preparing data (IPs) for designing so-called functional blocks realizing certain functions and using these data to design a desired system LSI as a combination of the respective functional blocks has been proposed as the design technology suitable for this system-on-chip solution. When such IPs, or data that configures or realizes at least one predetermined function, are used in a design method, the respective functional blocks can be constructed with predetermined configurations for realizing their functions in advance, so that the integrated circuit device can be designed just by designing the wiring among the respective functional blocks, and designing the peripheral circuits. With such a design method, design efficiency can be improved significantly.
However, the above-described IP-based LSI design method has the following problems.
When shifting from system level design to architecture design or functional design, a communication channel between the IPs is also given a concrete form. Thus, consideration must be given to data consistency between each of the IPs and the communication channel, which increases design man-hours. Moreover, when an IP that realizes a certain function is selected, it is very rare that the selected IP can be used for an LSI to be newly designed as it is, and considerable design man-hours are necessary for new designs, revisions and verifications. Furthermore, a power control circuit exclusively used for the LSI needs to be designed manually, so that design efficiency is low.